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54 DS882F1
CS42L73
4.8.6 Formats
Table 7 lists formats supported on the CS42L73 serial ports:
The XSPDIF and VSPDIF register bits are used to select the format for the XSP and VSP. There is no
selector for the ASP, since it always uses I²S format.
6.5000
8.0000 7.9951
-0.06
11 1100
11.0250 11.0169
-0.07
11 0101
12.0000 11.9926
-0.06
11 0100
16.0000 15.9902
-0.06
10 1100
22.0500 22.0339
-0.07
10 0101
24.0000 23.9852
-0.06
10 0100
32.0000 31.9803
-0.06
01 1100
44.1000 44.0678
-0.07
01 0101
48.0000 47.9705
-0.06
01 0100
6.4000
8.0000 8.0000
0.00
11 1110
11.0250 11.0345
0.09
11 0111
12.0000 12.0000
0.00
11 0110
16.0000 16.0000
0.00
10 1110
22.0500 22.0690
0.09
10 0111
24.0000 24.0000
0.00
10 0110
32.0000 32.0000
0.00
01 1110
44.1000 44.1379
0.09
01 0111
48.0000 48.0000
0.00
01 0110
Notes:
1. Refer to section “Internal Master Clock Generation” on page 42.
2. See “XSP Master Mode Clock Control Dividers” on page 89, “ASP Master Mode Clock Control Dividers” on
page 90, and “VSP Master Mode Clock Control Dividers” on page 92 for details regarding MMCC control.
3. For this row, the xSP_LRCK rate and resulting deviation varies based on the programming of MCLKDIV and
x_SCLK=MCLK. The values given, ValueA/ValueB, are applicable according to the rule set in Table 6.
Table 6. Actual xSP_LRCK Rate/Deviation Selector for Note 3
MCLKDIV[2:0] MCLK Divide Ratio x_SCLK=MCLK SCLK=MCLK Mode Applicable Value
xxx x 00b SCLK MCLK ValueA
xxx x 10b SCLK = MCLK ValueB
000 1 11b SCLK = Pre-MCLK ValueB
010 2 11b SCLK = Pre-MCLK ValueA
Table 7. Supported Serial Port Formats
Serial Port I²S Format PCM Format
XSP
ASP x
VSP
Table 5. Serial Port Rates and Master Mode Settings
MCLK Rate
(MHz) (Note 1)
Standard Audio
Sample Rate (kHz)
Actual Master Mode xSP_
LRCK Rate (Fs
ext
)
(kHz)
Deviation (%) Settings for x_
MMCC[5:0] (Note 2)
- Product Overview 1
- Ultralow Power Consumption 1
- Applications 1
- System Features 1
- General Description 3
- TABLE OF CONTENTS 4
- LIST OF FIGURES 9
- LIST OF TABLES 10
- 12 DS882F1 12
- DS882F1 13 13
- 1.3 Pin/Ball Descriptions 14
- DS882F1 15 15
- 2. TYPICAL CONNECTION DIAGRAM 17
- ABSOLUTE MAXIMUM RATINGS 20
- DC ELECTRICAL CHARACTERISTICS 21
- 22 DS882F1 22
- CHARACTERISTICS 24
- MIC BIAS CHARACTERISTICS 26
- --70-60dB 27
- 0.73•VA 0.79•VA 0.85•VA V 27
- Test Load 28
- Measurement 28
- FILTER CHARACTERISTICS 33
- POWER CONSUMPTION 34
- DMIC_SCLK 37
- = “s” or “m” 38
- Repeated 40
- 4. APPLICATIONS 41
- 4.5 Class H Amplifier 44
- 4.5.1 Power Control Options 44
- 48 DS882F1 48
- 4.5.3 Efficiency 49
- 4.6 DAC Limiter 49
- LIMRRATEx[2:0] 50
- LIMARATEx[2:0] 50
- 4.8 Serial Ports 51
- 4.8.1 Power Management 51
- 4.8.2 I/O 51
- 4.8.3 High-impedance Mode 52
- 4.8.4 Master and Slave Timing 52
- 4.8.4.1 SCLK = MCLK Modes 53
- 4.8.6 Formats 54
- 4.8.6.1 I²S Format 55
- 4.8.6.2 PCM Format 55
- 4.8.7 Mono/Stereo 57
- 4.8.8 Data Bit Depths 57
- 4.8.8.1 I²S Format Bit Depths 57
- 4.8.8.2 PCM Format Bit Depths 58
- 4.10 Input Paths 59
- DMIC_CLK 60
- 4.11 Digital Mixer 61
- 62 DS882F1 62
- 4.11.1 Mono and Stereo Paths 63
- 4.15 Interrupts 70
- 4.16 Control Port Operation 71
- 4.16.1 I²C Control 71
- 7 6 5 4 3 2 1 0 72
- 4.17 Fast Start Mode 73
- SPKLINEOUT 74
- EARSPKOUT 74
- Normal audioNo audio 75
- Clipped/Ramping audio 75
- 5. REGISTER QUICK REFERENCE 76
- DS882F1 77 77
- 78 DS882F1 78
- DS882F1 79 79
- 80 DS882F1 80
- (Read Only) 80
- 6. REGISTER DESCRIPTION 81
- 6.12.2 ASP Sample Rate 90
- 6.13.1 ASP Master/Slave Mode 90
- 6.14.5 VSP SDIN Location 92
- 6.15.1 VSP Master/Slave Mode 92
- 6.16.1 VSP Sample Rate 93
- 6.16.2 XSP Sample Rate 93
- 6.17.1 Digital Swap/Mono 94
- 6.17.2 Input Path Channel B=A 94
- 6.17.4 PGA Soft-Ramp 95
- 6.17.5 Analog Zero Cross 95
- 6.17.6 Digital Soft-Ramp 96
- 6.19.1 Mic PREAMP x Volume 98
- 6.19.2 PGAx Volume 98
- DS882F1 99 99
- DS882F1 103 103
- 104 DS882F1 104
- 76543210 110
- (Address 2Eh) 112
- 6.44.3 ALCx Soft-Ramp Disable 116
- 6.45.3 Mixer Soft-Ramp Enable 117
- 118 DS882F1 118
- DS882F1 119 119
- 120 DS882F1 120
- DS882F1 121 121
- 7. PCB LAYOUT CONSIDERATIONS 125
- 8. PERFORMANCE DATA 126
- DS882F1 127 127
- 128 DS882F1 128
- 8.3 Core Circuitry Attributes 129
- 8.3.1 ASRC Attributes 129
- 8.3.1.1 Response 129
- 8.3.1.2 Group Delay 130
- 8.3.1.3 Lock Time 130
- DS882F1 131 131
- 8.4.2 DAC HPF Response 132
- 8.4.4 Startup Times 133
- 9. PARAMETER DEFINITIONS 134
- 10.PACKAGE DIMENSIONS 135
- BUMP SIDESIDE VIEW 136
- TOP SIDE 136
- 11.THERMAL CHARACTERISTICS 137
- 12.ORDERING INFORMATION 137
- 13.REFERENCES 137
- 14.REVISION HISTORY 138
- DS882F1 139 139
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