Cirrus-logic CS4341 Manuale Utente

1Copyright © Cirrus Logic, Inc. 2005(All Rights Reserved)http://www.cirrus.com24-Bit, 96 kHz Stereo DAC with Volume ControlFeatures! 101 dB Dynamic Ra

CS434110 DS298F5SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE Parameters Symbol Min Max UnitsMCLK Frequency 1.024 51.2 MHzMCLK Duty Cycle 45 55 %

CS4341DS298F5 11SWITCHING CHARACTERISTICS - INTERNAL SERIAL CLOCK Notes: 6. The Duty Cycle must be 50% +/− 1/2 MCLK Period.7. See section 4.2.1 for de

CS434112 DS298F5SWITCHING CHARACTERISTICS - CONTROL PORT INTERFACE (I²C®) Notes: 8. Data must be held for sufficient time to bridge the transition tim

CS4341DS298F5 13SWITCHING CHARACTERISTICS - CONTROL PORT INTERFACE (SPI™) Notes: 10. tspi only needed before first falling edge of CS after RST risin

CS434114 DS298F5DC ELECTRICAL CHARACTERISTICS (AGND = 0 V; all voltages with respect to AGND.) Notes: 13. Normal operation is defined as RST = HI wi

CS4341DS298F5 152. PIN DESCRIPTION Pin Name # Pin DescriptionRST1Reset (Input) - Powers down device and resets registers to their default settings.SDA

CS434116 DS298F53. TYPICAL CONNECTION DIAGRAM 13Serial AudioDataProcessorExternal ClockMCLKAGNDAOUTBCS4341SDATALRCKVAAOUTA345140.1 µF+1µF12+3.0 V

CS4341DS298F5 174. APPLICATIONS4.1 Sample Rate Range/Operational Mode The device operates in one of two operational modes determined by the Master Clo

CS434118 DS298F5 4.2.2 External Serial Clock ModeThe device will enter the External Serial Clock Mode whenever 16 low to high transitions are de-tect

CS4341DS298F5 194.4 De-Emphasis The device includes on-chip digital de-emphasis. The Mode Control (address 01h) bits select either the32, 44.1 or 48 k

CS43412 DS298F5TABLE OF CONTENTS1. CHARACTERISTICS AND SPECIFICATIONS ...

CS434120 DS298F54.6.2 Power-DownTo prevent transients at power-down, the device must first enter its power-down state by enablingRST or setting the PD

CS4341DS298F5 214.9.1 Rise Time for Control Port ClockWhen excess capacitive loading is present on the I²C clock line, pin 6 (SCL/CCLK) may not havesu

CS434122 DS298F54.9.3a I²C WriteTo write to the device, follow the procedure below while adhering to the control port SwitchingSpecifications in secti

CS4341DS298F5 234.9.4 SPI ModeIn SPI mode, data is clocked into the serial control data line, CDIN, by the serial control port clock,CCLK (see Figure

CS434124 DS298F55. REGISTER QUICK REFERENCEAddr Function 7 6 5 4 3 2 1 00h MCLK Control Reserved Reserved Reserved Reserved Reserved Reserved MCLKDIV

CS4341DS298F5 256. REGISTER DESCRIPTIONNOTE: All registers are read/write in I²C Mode and write only in SPI mode, unless otherwise stated.6.1 MCLK CON

CS434126 DS298F56.2.2 DIGITAL INTERFACE FORMAT (DIF) BIT 4-6 Default = 000 - Format 0 (I²S, up to 24-bit data, 64 x Fs Internal SCLK)Function:The req

CS4341DS298F5 276.3 TRANSITION AND MIXING CONTROL (ADDRESS 02H)6.3.1 CHANNEL A VOLUME = CHANNEL B VOLUME (A = B) BIT 7 Default = 00 - Disabled1 - Ena

CS434128 DS298F56.3.3 ATAPI CHANNEL MIXING AND MUTING (ATAPI) BIT 0-4 Default = 01001 - AOUTA = Left Channel, AOUTB = Right Channel (Stereo)Function:

CS4341DS298F5 296.4 CHANNEL A VOLUME CONTROL (ADDRESS 03H)Same as CHANNEL B Volume Control.6.5 CHANNEL B VOLUME CONTROL (ADDRESS 04H)6.5.1 MUTE (MUTE

CS4341DS298F5 38.1 SOIC ...

CS434130 DS298F56.5.2 VOLUME (VOLx) BIT 0-6 Default = 0 dB (No Attenuation)Function:The digital volume control allows the user to attenuate the signa

CS4341DS298F5 317. PARAMETER DEFINITIONSTotal Harmonic Distortion + Noise (THD+N)The ratio of the rms value of the signal to the rms sum of all other

CS434132 DS298F58. PACKAGE DIMENSIONS8.1 SOIC INCHES MILLIMETERSDIM MIN NOM MAX MIN NOM MAXA 0.053 0.064 0.069 1.35 1.63 1.75A1 0.004 0.006 0.010 0.1

CS4341DS298F5 338.2 TSSOP Notes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include mold mismatch and

CS434134 DS298F510.REFERENCESCDB4341 Evaluation Board Datasheet11.REVISION HISTORYRevision ChangesF4Added lead-free packaging information F5Corrected

CS43414 DS298F51. CHARACTERISTICS AND SPECIFICATIONS(Min/Max performance characteristics and specifications are guaranteed over the Specified Operatin

CS4341DS298F5 5ANALOG CHARACTERISTICS (CS4341-KS/CZZ) (Test conditions (unless otherwise specified): Input test signal is a 997 Hz sine wave at 0 dBFS

CS43416 DS298F5ANALOG CHARACTERISTICS (CS4341-KS/CZZ) (Continued) Notes: 2. One-half LSB of triangular PDF dither is added to data.3. Refer to Figur

CS4341DS298F5 7COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE (The filter characteris-tics and the X-axis of the response plots have been

CS43418 DS298F5 Figure 3. Single-Speed Stopband Rejection Figure 4. Single-Speed Transition BandFigure 5. Single-Speed Transition Band (Deta

CS4341DS298F5 9Figure 9. Double-Speed Transition Band (Detail) Figure 10. Double-Speed Passband Ripple