Cirrus-logic CS42L73 Manuale Utente Scaricare il pdf (Pagina 46)

46 DS882F1

CS42L73

4.5.1.3 Adapt-to-Output Signal (Mode 111)

If the Adaptive Power bits are set to 111, the CS42L73 determines which of the three sets of rail voltages

to send to the amplifiers based solely on the level of the signal being sent to the amplifiers. If that signal

would cause the amplifiers to clip when operating on the lower set of rail voltages, the control logic in-

structs the charge pump to provide the next higher set of rail voltages to the amplifiers. If that signal would

not cause the amplifiers to clip when operating on the lower set of rail voltages, control logic instructs the

charge pump to provide the lower set of rail voltages to the amplifiers. This mode eliminates the need to

advise the CS42L73 of volume settings external to the device.

4.5.2 Power Supply Transitions

Charge pump transitions from the lower to the higher set of rail voltages occur on the next FLYN/FLYP

clock cycle. Despite the system’s fast response time, the capacitive elements on the VCP_FILT pins pre-

vent the rail voltages from changing instantaneously. Instead, the voltages ramp up from the lower to the

higher supply, based on the time constant created by the output impedance of the charge pump and the

capacitor on the VCP_FILT pin (the transition time is approximately 20 µs). The behavior of ±VCP/2 to

and from ±VCP is shown in Figure 19. During this charging transition, a high dv/dt transient on the inputs

may briefly clip the outputs before the rail voltages charge to the full higher supply level. This transitory

clipping has been found to be inaudible in listening tests.

Referenced Control Register Location

PDN_HP..............................

HPxAVOL ............................

HPxAMUTE .........................

PDN_LO ..............................

LOxAVOL ............................

LOxAMUTE .........................

HL_PLYBCKB=A .................

HLxDMUTE .........................

HLxDVOL ............................

PDN_ADCx .........................

PDN_DMICx........................

IPB=A ..................................

PGAB=A..............................

PGAxMUX ...........................

BOOSTx ..............................

IPxMUTE .............................

MIC_PREAMPx...................

PGAxVOL............................

IPxDVOL .............................

HLx_IPx...............................

HLx_XSPx ...........................

HLx_ASPx ...........................

HLx_VSPM..........................

STRINV ...............................

ASPINV ...............................

VSPINV ...............................

XSPINV ...............................

“Power Down Headphone” on page 85

“Headphone x Analog Volume Control” on page 103

“Headphone x Analog Mute” on page 103

“Power Down Line Output” on page 85

“Line Output x Analog Volume Control” on page 104

“Line Output x Analog Mute” on page 104

“Headphone/Line Output (HL) Playback Channels B=A” on page 100

“Headphone/Line Output (HL) x Digital Mute” on page 101

“Headphone/Line Output (HL) x Digital Volume Control” on page 101

“Power Down ADC x” on page 82

“Power Down Digital Mic x” on page 82

“Input Path Channel B=A” on page 94

“PREAMP and PGA Channel B=A” on page 94

“PGA x Input Select” on page 97

“Boost x” on page 97

“Input Path x Digital Mute” on page 97

“Mic PREAMP x Volume” on page 98

“PGAx Volume” on page 98

“Input Path x Digital Volume Control” on page 99

“Stereo Mixer Input Attenuation” on page 119

“Stereo Input Path Advisory Volume” on page 105

“ASP Input Advisory Volume” on page 106

“VSP Input Advisory Volume” on page 106

“XSP Input Advisory Volume” on page 105

1 2 ... 41 42 43 44 45 46 47 48 49 50 51 ... 138 139

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Cirrus-logic CS42L73 Manuale Utente Pagina 46

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