Cirrus-logic CS35L32 Manuale Utente

Copyright  Cirrus Logic, Inc. 2014(All Rights Reserved)http://www.cirrus.comJUL ‘14DS963F4Boosted Class D Amplifier with Speaker-Protection Monitorin

10 DS963F4CS35L323 Characteristics and SpecificationsTable 3-6. Speaker Amplifier Output CharacteristicsTest conditions, except where noted otherwise:

DS963F4 11CS35L323 Characteristics and SpecificationsTable 3-7. Signal Monitoring CharacteristicsTest conditions, except where noted otherwise: VA = 1

12 DS963F4CS35L323 Characteristics and SpecificationsTable 3-9. PSRR CharacteristicsTest conditions, except where noted otherwise: VA = 1.8 V, VP = 3.

DS963F4 13CS35L323 Characteristics and SpecificationsTable 3-12. Switching Specifications: ADSP in I2S ModeTest conditions, except where noted otherwi

14 DS963F4CS35L323 Characteristics and SpecificationsTable 3-13. Switching Specifications: I²C Control PortTest conditions, except where noted otherwi

DS963F4 15CS35L324 Functional Description4 Functional DescriptionFigure 4-1. CS35L32 Block Diagram4.1 Power SuppliesThe VA and VP supplies are require

16 DS963F4CS35L324.3 Speaker AmplifierTo clear any status bits set due to the initiation of a path or block, all interrupt status bits should be read

DS963F4 17CS35L324.4 Low-Battery Management4.3.2 Class G Operation with LEDs OnIf LEDs are active, the speaker amplifier supply in one of the followin

18 DS963F4CS35L324.5 Undervoltage Lockout (UVLO)4.5 Undervoltage Lockout (UVLO)If the VP level falls below the lockout threshold specified in Table 3-

DS963F4 19CS35L324.8 Signal Monitoring4.7.1 Error ConditionsTable 4-3 lists overtemperature error status and mask bits. The overtemperature error and

2 DS963F4CS35L32 General DescriptionThe CS35L32 is a low-quiescent power-integrated audio IC, with a mono full-bridge Class D speaker amplifier operat

20 DS963F4CS35L324.8 Signal Monitoring4.8.2 Monitoring Voltage across the Load—VMONAs shown in Fig. 4-5, monitoring on VMON is accomplished via the VS

DS963F4 21CS35L324.9 LED Driver4.8.4 Monitoring Voltage on the VP Pin—VPMONMonitoring of the voltage present on the VP pin is integrated internally to

22 DS963F4CS35L324.9 LED DriverThe CS35L32 is driven to flash when FLEN is asserted high. The I2C interface allows a host to program Flash and Movie M

DS963F4 23CS35L324.10 Power Budgeting4.9.3 LED Lighting Status RegisterThe LED lighting status register (see Section 7.22) reports the state of LEDs a

24 DS963F4CS35L324.11 Audio/Data Serial Port (ADSP)4.10.3 Audio and LED OperationWhen audio and LEDs are operating simultaneously, the user can select

DS963F4 25CS35L324.11 Audio/Data Serial Port (ADSP)4.11.1.1 Tristating the ADSP SDOUT Path (SDOUT_3ST)If the SDOUT functionality of the ADSP is not re

26 DS963F4CS35L324.12 Signaling FormatThe CS35L32 transmits data that is from 24 to 32 bits deep per channel sample. If fewer than 24 serial clocks ar

DS963F4 27CS35L324.12 Signaling Format4.12.2 Transmitting Data from a Single-CS35L32 ConfigurationFor a single CS35L32, the user clears SHARE (see p.

28 DS963F4CS35L324.12 Signaling Format4.12.3 Transmitting Data from a Dual-CS35L32 ConfigurationTo indicate a dual-CS35L32 configuration where the SDO

DS963F4 29CS35L324.13 Device Clocking4.13 Device ClockingThe device can operate as a clock master, creating both SCLK and LRCK for itself and for othe

DS963F4 3CS35L32 The battery voltage, speaker voltage, and speaker current signals are monitored, digitized using  converters, and serialized over a

30 DS963F4CS35L324.14 Control Port Operation4.13.3 Error ConditionsMCLK, SCLK, and LRCK are monitored for clocking and configuration errors. If an MCL

DS963F4 31CS35L324.14 Control Port OperationFigure 4-11. Control-Port Timing—I2C Writes with AutoincrementThe logic state of FLOUT2/AD0 configures the

32 DS963F4CS35L325 ApplicationsReceive acknowledge bit.Send stop condition, aborting write. Send start condition. Send 10000001 (chip address and read

DS963F4 33CS35L325.3 External Component and PCB Design Considerations—EMI OutputTo avoid the current transient on the VP node, the boost converter man

34 DS963F4CS35L325.5 Inductor SelectionFigure 5-2. Ground Ball Locations (Shown in Gray)Also, as space permits, traces should be wider than 12 mils as

DS963F4 35CS35L326 Register Quick Reference6 Register Quick ReferenceDefault values are shown below the bit names.I²C Address:AD0 = 0: 1000000[R/W] –

36 DS963F4CS35L327 Register Descriptions7 Register DescriptionsAll registers are read/write except for the chip ID and revision register and the statu

DS963F4 37CS35L327.6 Power Control 2 7.6 Power Control 2Address 0x07R/W76543210PDN_VMON PDN_IMON PDN_VPMON — SDOUT_3ST —Default11101000Bits Name Desc

38 DS963F4CS35L327.9 Battery Voltage Monitor 7.9 Battery Voltage MonitorAddress 0x0AR/O76543210VPMON[7:0]Default00000000Bits Name Description7:0 VPMON

DS963F4 39CS35L327.13 ADSP Control7.13 ADSP ControlAddress 0x0FR/W76543210ADSP_DRIVE M/S DATCNF[1:0] SHARE —Default00100000Bits Name Description7ADSP_

4 DS963F4CS35L32 Table of Contents1 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Typical Connection

40 DS963F4CS35L327.16 Interrupt Mask 10OTE_RLSOvertemperature error protection release. Releases (removes) OTE-caused Speaker-Safe Mode if the OTE con

DS963F4 41CS35L327.18 Interrupt Mask 37.18 Interrupt Mask 3Address 0x14R/W76 5 4 3 2 1 0M_UVLOM_LED2_OPEN M_LED2_SHORT M_LED1_OPEN M_LED1_SHORTM_LOWBA

42 DS963F4CS35L327.20 Interrupt Status 2 (Monitors)7.20 Interrupt Status 2 (Monitors)Address 0x16R/O76543210VMON_OVFL IMON_OVFL VPMON_OVFL — PDN_DONED

DS963F4 43CS35L327.22 LED Lighting Status7.22 LED Lighting StatusAddress 0x18R/O76543210LED1_FLEV LED2_FLEV LED1_MVEV LED2_MVEV LED_FLEN LED_FLINH LED

44 DS963F4CS35L327.24 LED Movie Mode Current7.24 LED Movie Mode CurrentAddress 0x1AR/W76543210— LED_MVCUR[2:0] —LED1_MVENLED2_MVENDefault00000000Bits

DS963F4 45CS35L328 Typical Performance Plots8 Typical Performance Plots8.1 System-Level Efficiency and Power-Consumption PlotsFor all system-level eff

46 DS963F4CS35L328.2 Audio Output Typical Performance Plots8.2 Audio Output Typical Performance PlotsTo avoid nonlinearities (distortion) introduced b

DS963F4 47CS35L328.3 Monitoring Typical Performance Plots8.3 Monitoring Typical Performance PlotsUnless otherwise noted, all VMON/IMON plots use the a

48 DS963F4CS35L328.3 Monitoring Typical Performance PlotsFigure 8-13. IMON THD+N Ratio vs. Frequency—Bypass Mode (VBST = VP = 3.6 V, Load = 0.5 W)Fixe

DS963F4 49CS35L329 Parameter Definitions9 Parameter DefinitionsFigure 8-17. VMON to IMON Phase vs. Frequency @ 1 W—Fixed-Boost Mode (VBST = 5 V)Load =

DS963F4 5CS35L321 Pin Descriptions1 Pin DescriptionsFigure 1-1. Top-Down (Through-Package) View—30-Ball WLCSP Package‘‘‘‘‘SDA SCL SDOUT SCLK MCLK FLOU

50 DS963F4CS35L3210 Package Dimensions10 Package DimensionsFigure 10-1. 30-Ball WLCSP Package Drawing 11 Thermal Characteristics12 Ordering Informatio

DS963F4 51CS35L3213 References13 References1. NXP Semiconductors (founded by Philips Semiconductor), The I²C-Bus Specification and User Manual. UM1020

6 DS963F4CS35L321 Pin DescriptionsRESETB3 VA I Reset. When asserted, the device enters a low-power mode, outputs are set to Hi-Z, and I²C register val

DS963F4 7CS35L322 Typical Connection Diagram2 Typical Connection DiagramFigure 2-1. Typical Connection DiagramBattery1 HCOUT0.1 0.1 F**LBST44.2 kR

8 DS963F4CS35L323 Characteristics and Specifications3 Characteristics and SpecificationsTable 3-1. Recommended Operating ConditionsGNDA = GNDP = 0 V,

DS963F4 9CS35L323 Characteristics and Specifications Table 3-4. Boost Converter CharacteristicsTest conditions, except where noted otherwise: VA = 1.8