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CDB5378
DS639DB4 5
LIST OF FIGURES
Figure 1. CDB5378 Block Diagram............................................................................................... 13
Figure 2. Quad Group Routing of RC Filter Components ............................................................. 18
Figure 3. CPLD Default Signal Assignments ................................................................................ 24
Figure 4. Differential Pair Routing................................................................................................. 32
Figure 5. Quad Group Routing...................................................................................................... 33
Figure 6. Bypass Capacitor Placement......................................................................................... 33
Figure 7. Dual-row Headers with Shorts ....................................................................................... 34
- Features 1
- General Description 1
- 2 DS639DB4 2
- IMPORTANT NOTICE 2
- TABLE OF CONTENTS 3
- LIST OF FIGURES 5
- LIST OF TABLES 6
- 1. INITIAL SETUP 7
- 1.1 Kit Contents 7
- 1.2 Hardware Setup 7
- 1.3 Software Setup 11
- 1.3.1 PC Requirements 11
- 12 DS639DB4 12
- 1.4 Self-testing CDB5378 13
- 1.4.1 Noise test 13
- 1.4.2 Distortion Test 14
- 2.1 Block Diagram 15
- 2. HARDWARE DESCRIPTION 15
- 2.2 Analog Hardware 16
- 2.2.1 Analog Inputs 16
- 2.2.1.4 Input Protection 17
- 2.2.1.5 Input RC Filters 17
- 2.2.1.6 Common Mode Bias 18
- 2.2.2.3 Anti-alias RC Filters 19
- 2.2.3 Delta-Sigma Modulator 20
- DS639DB4 21 21
- 2.2.5.1 VREF_MOD 22
- 2.2.5.2 Common Mode Bias 22
- GPIO Signals Description 23
- 2.3.1.3 Phase Locked Loop 24
- 2.3.2 Interface CPLD 25
- 26 DS639DB4 26
- 2.3.3 Digital Control Signals 27
- 2.3.4 Microcontroller 27
- 28 DS639DB4 28
- 2.3.5 RS-485 Telemetry 29
- 2.3.5.1 CLK, SYNC 30
- 2.3.6 UART Connection 31
- 2.3.7 External Connector 32
- 2.4 Power Supplies 32
- DS639DB4 33 33
- 2.5 PCB Layout 34
- 2.5.1 Layer Stack 34
- 2.5.2 Differential Pairs 34
- 2.5.3 Bypass Capacitors 35
- 2.5.4 Dual-row Headers 36
- 3. SOFTWARE DESCRIPTION 37
- 3.1 Menu Bar 37
- 3.2 About Panel 38
- • Data Capture 39
- 3.3.1 USB Port 40
- 3.3.2 Digital Filter 41
- 3.3.3 Analog Front End 42
- 3.3.4 Test Bit Stream 43
- 3.3.5 Gain / Offset 44
- 3.3.6 Data Capture 45
- 3.3.7 External Macros 46
- 3.4 Analysis Panel 47
- 3.4.1 Test Select 48
- 3.4.2 Statistics 49
- 3.4.3 Plot Enable 49
- 3.4.4 Cursor 49
- 3.4.5 Zoom 50
- 3.4.6 Refresh 50
- 3.4.7 Harmonics 50
- 3.4.8 Spot Noise 50
- 3.4.9 Plot Error 50
- 3.5 Control Panel 51
- 3.5.1 DF Registers 52
- 3.5.2 DF Commands 52
- 3.5.3 SPI 52
- 3.5.4 Macros 53
- 3.5.5 GPIO 53
- 3.5.6 Customize 54
- 3.5.7 External Macros 54
- 4. BILL OF MATERIALS 55
- 56 DS639DB4 56
- DS639DB4 57 57
- 5. LAYER PLOTS 58
- DS639DB4 59 59
- 60 DS639DB4 60
- DS639DB4 61 61
- 62 DS639DB4 62
- DS639DB4 63 63
- 6. SCHEMATICS 64
- DS639DB4 65 65
- 66 DS639DB4 66
- DS639DB4 67 67
- 68 DS639DB4 68
- DS639DB4 69 69
- 70 DS639DB4 70
- DS639DB4 71 71
- 72 DS639DB4 72
- DS639DB4 73 73
- 7. REVISION HISTORY 74
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