Cirrus-logic CS485xx Manuale Utente Pagina 69
- Pagina / 102
- Indice
- SEGNALIBRI
- CS485xx 1
- Contents 3
- Chapter 1 9
- 1.1 Overview 9
- Overview 10
- 1.2 Code Overlays 13
- 1.3.1 DSP Core 14
- 1.3.2 Debug Controller (DBC) 14
- 1.3.10 Internal Timers 16
- 1.3.11 Watchdog Timer 16
- 1.3.12 Clock Manager and PLL 16
- 1.3.9 DMA Controller 16
- Introduction 19
- 2.3 Slave Boot Procedures 20
- 2.3.1 Slave Boot 21
- Slave Boot Procedures 22
- 2.3.2.1 Slave Boot Procedure 23
- 2.3.3 Boot Messages 24
- 2.5 Softboot 26
- 2.5.2.1 Softboot Steps 27
- 2.5.2.2 Softboot Example 27
- Softboot 28
- CS485xx to begin 28
- Mnemonic Value 30
- Send .uld from Table 2 31
- Chapter 3 33
- Serial Control Port 33
- 3.1 Introduction 33
- 3.2.1 I 34
- 3.2.2 I 35
- C System Bus Description 35
- 3.2.2.1 I 36
- C Bus Dynamics 36
- Figure 3-4. I 37
- C Address with ACK and NACK 37
- 3.2.2.2.1 SCP_BSY Behavior 39
- 3.2.2.3.1 I 40
- C Write Protocol Procedure 40
- Figure 3-9. I 42
- C Read Flow Diagram 42
- 3.2.2.4.1 I 43
- C Read Protocol Procedure 43
- 3.2.2.4.2 SCP_IRQ Behavior 43
- M S S M S M S M S M M 44
- 3.3 SPI Port 45
- 3.3.1.1 SPI Bus Dynamics 47
- 3.3.1.1.1 SCP_BSY Behavior 48
- 3.3.1.2 SPI Messaging 49
- SPI Port 50
- 4.2.1 DAI Pin Description 56
- DAI1_DATA0 57
- DMA to Peripheral Bus 57
- DAI1_DATA1 57
- DAI2_DATA0 57
- DAI1_DATA2 57
- 4.2.3 Digital Audio Formats 59
- A - Data Format 60
- B - SCLK Polarity 60
- C - LRCLK Polarity 60
- D - DAI Mode (Unsupported) 61
- E - DAI2_DATA Clock Source 61
- F - DAI1_DATA Clock Source 61
- G - Chip Version 61
- H - Chip Version 61
- DAI Hardware Configuration 64
- Chapter 5 65
- Chapter 6 67
- 6.1 Introduction 67
- DAO1_DATA3, XMTA 68
- DAO_MCLK 68
- DAO_SCLK 68
- DAO_LRCLK 68
- 6.2.3 DAO Interface Formats 70
- 6.2.5 S/PDIF Transmitter 75
- 0x8100001e 76
- 0x00005080 76
- Chapter 7 77
- 7.1 System Clocking Controls 77
- XTAL_OUT Divide-by-2 78
- Chapter 8 79
- 8.1 Introduction 79
- 8.2 GPIO Description 79
- Watchdog Timer Description 80
- Typical Connection Diagrams 81
- Figure 9-2. I 83
- Figure 9-3. I 84
- Figure 9-4. I 85
- 9.2 Pin Description 90
- 9.2.2 PLL Filter 91
- 9.3 Clocking 92
- 9.4 Control 92
- 9.4.1 Operational Mode 93
- 48-Pin LQFP Pin Assigments 94
- Pin Assignments 100
- Revision Date Changes 101
- Revision History 102
Prodotti e manuali riguardandi Hardware Cirrus-logic CS485xx
(60 pagine)
(44 pagine)
(37 pagine)
(20 pagine)
(63 pagine)
(162 pagine)
(118 pagine)
(31 pagine)
(16 pagine)
(30 pagine)
(14 pagine)
(10 pagine)
(22 pagine)
(22 pagine)
(14 pagine)
(21 pagine)
(9 pagine)
(23 pagine)
(42 pagine)
© 2020, manymanuals.it. Tutti i diritti riservati | 0.034 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Commenti su questo manuale