Cirrus-logic CS4364 Manuale Utente

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Copyright © Cirrus Logic, Inc. 2008
(All Rights Reserved)
http://www.cirrus.com
103 dB, 192 kHz 6-Channel D/A Converter
Features
Advanced Multi-bit Delta Sigma Architecture
24-bit Conversion
Automatic Detection of Sample Rates up to
192 kHz
103 dB Dynamic Range
-88 dB THD+N
Single-Ended Output Architecture
Direct Stream Digital
®
(DSD
™)
Mode
Non-Decimating Volume Control
On-Chip 50 kHz Filter
Matched PCM and DSD Analog Output
Levels
Selectable Digital Filters
Volume Control with 1/2-dB Step Size and Soft
Ramp
Low Clock-Jitter Sensitivity
+5 V Analog Supply, +2.5 V Digital Supply
Separate 1.8 to 5 V Logic Supplies for the
Control and Serial Ports
Description
The CS4364 is a complete 6-channel digital-to-analog
system. This D/A system includes digital de-emphasis,
half-dB step size volume control, ATAPI channel mix-
ing, selectable fast and slow digital interpolation filters
followed by an oversampled, multi-bit delta sigma mod-
ulator which includes mismatch shaping technology that
eliminates distortion due to capacitor mismatch. Follow-
ing this stage is a multi-element switched capacitor
stage and low-pass filter with single-ended analog
outputs.
The CS4364 also has a proprietary DSD processor
which allows for volume control and 50 kHz on-chip fil-
tering without an intermediate decimation stage. It also
offers an optional path for direct DSD conversion by di-
rectly using the multi-element switched capacitor array.
The CS4364 accepts PCM data at sample rates from
4 kHz to 216 kHz, DSD audio data, and delivers excel-
lent sound quality. These features are ideal for multi-
channel audio systems including SACD players, A/V re-
ceivers, digital TV’s, mixing consoles, effects
processors, and sound cards.
This product is available in 48-pin LQFP package in
Commercial (-40°C to +85°C) temperature grade. See
“Ordering Information” on page 49 for complete details.
Control Port Supply = 1.8 V to 5 V
Register/Hardware
Configuration
Internal Voltage
Reference
Reset
Serial Interface
Level Translator
Level Translator
Digital Supply = 2.5 V
Hardware Mode or
I
2
C/SPI Software Mode
Control Data
Analog Supply = 5 V
Six Channels of
Single-Ended
Outputs
6
PCM Serial
Audio Input
Volume
Controls
Digital
Filters
Switch-Cap
DAC and
Analog Filters
Multi-bit ∆Σ
Modulators
DSD Audio
Input
DSD Processor
-Volume control
-50 kHz filter
External Mute
Control
Mute Signals
6
6
Serial Audio Port
Supply = 1.8 V to 5 V
CS4364
MAY '08
DS619F1
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1 2 3 4 5 6 ... 49 50

Sommario

Pagina 1 - Description

Copyright © Cirrus Logic, Inc. 2008(All Rights Reserved)http://www.cirrus.com103 dB, 192 kHz 6-Channel D/A ConverterFeatures Advanced Multi-bit Delta

Pagina 2 - TABLE OF CONTENTS

10 DS619F1CS4364POWER AND THERMAL CHARACTERISTICS Notes:4. Current consumption increases with increasing FS within a given speed mode and is signal

Pagina 3

DS619F1 11CS4364COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSEThe filter characteristics have been normalized to the sample rate (Fs) and

Pagina 4 - LIST OF FIGURES

12 DS619F1CS4364COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE(CONTINED)DSD COMBINED DIGITAL & ON-CHIP ANALOG FILTER RESPONSEParamete

Pagina 5 - LIST OF TABLES

DS619F1 13CS4364DIGITAL CHARACTERISTICS13. Any pin except supplies. Transient currents of up to ±100 mA on the input pins will not cause SCR latch-upP

Pagina 6 - 1. PIN DESCRIPTION

14 DS619F1CS4364SWITCHING CHARACTERISTICS - PCM(Inputs: Logic 0 = GND, Logic 1 = VLS, CL = 30 pF) Notes:14. After powering up, RST should be held

Pagina 7 - Pin Name # Pin Description

DS619F1 15CS4364SWITCHING CHARACTERISTICS - DSD(Logic 0 = AGND = DGND; Logic 1 = VLS; CL=30pF) Parameter Symbol Min Typ Max UnitMCLK Duty Cycle 40 -

Pagina 8 - ABSOLUTE MAXIMUM RATINGS

16 DS619F1CS4364SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT(Inputs: Logic 0 = GND, Logic 1 = VLC, CL=30pF)Notes:16. Data must be held for su

Pagina 9 - DAC ANALOG CHARACTERISTICS

DS619F1 17CS4364SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT (Inputs: Logic 0 = GND, Logic 1 = VLC, CL=30pF)Notes:17. tspi only needed before

Pagina 10

18 DS619F1CS43643. TYPICAL CONNECTION DIAGRAM VLSMCL KVDAOUT18320.1 µF+1 µF+2.5 VSDIN191 µF0.1 µF++2021FILT+CMOUT76LRCKSCLKSDIN3SDIN2390.1 µF47 µ

Pagina 11

DS619F1 19CS4364 VLSCS4364MCL KVDAOUT18320.1 µF+1 µF+2.5 VSDIN191 µF0

Pagina 12

2 DS619F1CS4364TABLE OF CONTENTS1. PIN DESCRIPTION...

Pagina 13 - DIGITAL CHARACTERISTICS

20 DS619F1CS43644. APPLICATIONS The CS4364 serially accepts twos complement formatted PCM data at standard audio sample rates including 48,44.1 and 32

Pagina 14

DS619F1 21CS43644.2 Mode SelectIn Hardware Mode, operation is determined by the Mode Select pins. The states of these pins are continu-ally scanned f

Pagina 15 - DS619F1 15

22 DS619F1CS43644.3 Digital Interface Formats The serial port operates as a slave and supports the I²S, Left-Justified, Right-Justified, and One-Line

Pagina 16 - Repeated

DS619F1 23CS4364 4.3.1 OLM #1OLM #1 serial audio interface format operates in Single-, Double-, or Quad-Speed Mode and will slave toSCLK at 128 Fs. Si

Pagina 17

24 DS619F1CS43644.5 Interpolation FilterTo accommodate the increasingly complex requirements of digital audio systems, the CS4364 incorporatesselectab

Pagina 18 - 18 DS619F1

DS619F1 25CS43644.7 ATAPI SpecificationThe CS4364 implements the channel mixing functions of the ATAPI CD-ROM specification. TheATAPI functions are a

Pagina 19 - DS619F1 19

26 DS619F1CS4364 Figure 18. DSD Phase Modulation Mode Diagram4.9 Grounding and Power Supply ArrangementsAs with any high resolution converter, the CS

Pagina 20 - 4. APPLICATIONS

DS619F1 27CS4364 4.11 The MUTEC OutputsThe MUTEC1 pins have an auto-polarity detect feature. The MUTEC output pins are high impedance at thetime of

Pagina 21 - 4.2 Mode Select

28 DS619F1CS4364 Figure 21. Recommended Mute Circuitry 4.12 Recommended Power-Up Sequence4.12.1 Hardware Mode1. Hold RST low until the power supplies

Pagina 22 - 22 DS619F1

DS619F1 29CS4364converted incorrectly by the Hardware Mode settings).4. Set the PDN bit to 0. This will initiate the power-up sequence, which lasts ap

Pagina 23 - 4.4 Oversampling Modes

DS619F1 3CS43646.3 PCM Control (Address 03h) ...

Pagina 24 - 4.6 De-Emphasis

30 DS619F1CS43644.14.2.2 I²C ReadTo read from the device, follow the procedure below while adhering to the control port Switching Specifica-tions.1. I

Pagina 25 - 4.7 ATAPI Specification

DS619F1 31CS43646. If the INCR bit is set to 0 and further SPI writes to other registers are desired, it is necessary to bringCS high, and follow the

Pagina 26 - 4.9.1 Capacitor Placement

32 DS619F1CS43645. REGISTER QUICK REFERENCE Addr Function 7 6 5 4 3 2 1 001h Chip Revision PART4 PART3 PART2 PART1 PART0 REV2 REV1 REV0default 0 1 1 0

Pagina 27 - 4.11 The MUTEC Outputs

DS619F1 33CS43646. REGISTER DESCRIPTIONNote: All registers are read/write in I²C Mode and write only in SPI, unless otherwise noted.6.1 Chip Revision

Pagina 28 - 4.12.2 Software Mode

34 DS619F1CS43646.2.3 PCM/DSD Selection (DSD/PCM)Default = 00 - PCM1 - DSDFunction:This function selects DSD or PCM Mode. The appropriate data and clo

Pagina 29 - 4.14.2.1 I²C Write

DS619F1 35CS4364 6.3.2 Functional Mode (FM)Default = 1100 - Single-Speed Mode (4 to 50 kHz sample rates)01 - Double-Speed Mode (50 to 100 kHz sample r

Pagina 30 - 4.14.3.1 SPI Write

36 DS619F1CS43646.4.2 Direct DSD Conversion (DIR_DSD)Function:When set to 0 (default), DSD input data is sent to the DSD processor for filtering and v

Pagina 31 - 00000000

DS619F1 37CS43646.5 Filter Control (Address 05h)6.5.1 Interpolation Filter Select (FILT_SEL) Function:When set to 0 (default), the Interpolation Filte

Pagina 32 - 5. REGISTER QUICK REFERENCE

38 DS619F1CS4364Function:The AOUTAx and AOUTBx volume levels are independently controlled by the A and the B Channel Vol-ume Control Bytes when this f

Pagina 33 - 6. REGISTER DESCRIPTION

DS619F1 39CS4364sample rate) if the signal does not encounter a zero crossing. The zero cross function is independentlymonitored and implemented for e

Pagina 34 - 6.3 PCM Control (Address 03h)

4 DS619F1CS4364LIST OF FIGURESFigure 1. Serial Audio Interface Timing...

Pagina 35 - 6.4 DSD Control (Address 04h)

40 DS619F1CS43646.8.6 MUTE Polarity and DETECT (MUTEP1:0) Default = 0000 - Auto polarity detect, selected from MUTEC1 pin01 - Reserved 10 - Active low

Pagina 36

DS619F1 41CS4364Selects the appropriate digital filter to maintain the standard 15 µs/50 µs digital de-emphasis filter re-sponse at 32, 44.1 or 48 kHz

Pagina 37

42 DS619F1CS43646.11 Volume Control (Address 0Bh, 0Ch, 0Eh, 0Fh, 11h, 12h)These six registers provide individual volume and mute control for each of t

Pagina 38 - 10111100

DS619F1 43CS43647. FILTER RESPONSE PLOTS 0.4 0.5 0.6 0.7 0.8 0.9 1−120−100−80−60−40−200Frequency(normalized to Fs)Amplitude (dB)0.4 0.42 0.44 0.46 0.4

Pagina 39 - 6.8.5 DSD Auto-Mute (DAMUTE)

44 DS619F1CS4364 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5−0.02−0.015−0.01−0.00500.0050.010.0150.02Frequency(normalized to Fs)Amplitude (dB)0.4

Pagina 40 - 6.9.1 Mute (MUTE_xx)

DS619F1 45CS4364 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1120100806040200Frequency(normalized to Fs)Amplitude (dB)0.2 0.3 0.4 0.5 0.6 0.7 0.8120100806040200

Pagina 41 - Table 9. ATAPI Decode

46 DS619F1CS4364 0.45 0.46 0.47 0.48 0.49 0.5 0.51 0.52 0.53 0.54 0.55109876543210Frequency(normalized to Fs)Amplitude (dB)0 0.05 0.1 0.15 0.2 0.250

Pagina 42

DS619F1 47CS43648. REFERENCES1. How to Achieve Optimum Performance from Delta-Sigma A/D & D/A Converters, by Steven Harris. Paperpresented at the

Pagina 43 - 7. FILTER RESPONSE PLOTS

48 DS619F1CS436410.PACKAGE DIMENSIONSINCHES MILLIMETERSDIM MIN NOM MAX MIN NOM MAXA --- 0.055 0.063 --- 1.40 1.60A1 0.002 0.004 0.006 0.05 0.10 0.15B

Pagina 44 - Amplitude (dB)

DS619F1 49CS436411.ORDERING INFORMATIONProduct Description Package Pb-Free Grade Temp Range Container Order #CS4364114 dB, 192 kHz 6-channel D/A Conve

Pagina 45

DS619F1 5CS4364LIST OF TABLESTable 1. Single-Speed Mode Standard Frequencies ...

Pagina 46

50 DS619F1CS436412.REVISION HISTORY Release ChangesA1 Initial ReleaseF1Corrected DAC Pair Disable register description in “DAC Pair Disable (DACx_DIS)

Pagina 47 - 9. PARAMETER DEFINITIONS

6 DS619F1CS43641. PIN DESCRIPTIONPin Name # Pin DescriptionVD 4Digital Power (Input) - Positive power supply for the digital section. Refer to the Rec

Pagina 48 - 48L LQFP PACKAGE DRAWING

DS619F1 7CS4364FILT+ 20Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling cir-cuits. Requires the capacitive d

Pagina 49 - 11.ORDERING INFORMATION

8 DS619F1CS43642. CHARACTERISTICS AND SPECIFICATIONSRECOMMENDED OPERATING CONDITIONS(GND = 0 V; all voltages with respect to ground.)ABSOLUTE MAXIMUM

Pagina 50 - 12.REVISION HISTORY

DS619F1 9CS4364DAC ANALOG CHARACTERISTICSTest Conditions (unless otherwise indicated): VA = VLS = VLC = 5 V; VD = 2.5 V; TA = 25 °C; Full-Scale 997 Hz

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