Cirrus-logic AN83 Manuale Utente Pagina 17
- Pagina / 58
- Indice
- SEGNALIBRI
- Application Note 1
- TABLE OF CONTENTS 2
- AN83REV3 3 3
- SCHEMATIC CHECKLIST 4
- SOFTWARE CHECKLIST 5
- INTRODUCTION TO CS8900A 6
- TECHNICAL REFERENCE MANUAL 6
- HARDWARE DESIGN 7
- BUS SYSTEMS 7
- The CS8900A Architecture 7
- CS8900A in I/O Mode 8
- CS8900A in Memory Mode 8
- DMA Interface of the CS8900A 8
- Address Generation 9
- Read and Write Signals 10
- SBHE Signal 10
- Other Control Signals 10
- Status Signals from CS8900A 11
- Databus (SD[0:15]) Connection 11
- EEPROM Optional 11
- Cirrus Logic CL-PS7211 12
- Hitachi SH3 12
- AN83REV3 13 13
- 14 AN83REV3 14
- AN83REV3 15 15
- CS8900 EVAL BOARD REV. B 16
- P/N CDB8900B 16
- CS8900 EVAL BOARD REV. C 17
- 10BASE-T Interface 18
- 10BASE-2 and AUI Interfaces 18
- Logic Schematics 18
- AN83REV3 19 19
- Bill of Material 20
- AN83REV3 21 21
- AN83REV3 23 23
- 24 AN83REV3 24
- AN83REV3 25 25
- AUI Interface 26
- AN83REV3 27 27
- 28 AN83REV3 28
- AN83REV3 29 29
- Memory Mode 31
- Lower Memory Mode 31
- Extended Memory Mode 31
- 32 AN83REV3 32
- Figure 23. PAL Program 34
- AN83REV3 39 39
- 40 AN83REV3 40
- AN83REV3 41 41
- 42 AN83REV3 42
- AN83REV3 43 43
- RECOMMENDED MAGNETICS FOR 44
- THE CS8900A 44
- JUMPERLESS DESIGN 45
- Serial EEPROM 45
- Reset Configuration Block 45
- Table 6. Transformer Vendors 46
- IEEE Physical Address 49
- ISA Configuration Flags 49
- PacketPage Memory Base 50
- Boot PROM Memory Base 50
- Boot PROM Mask 50
- Transmission Control 50
- Adapter Configuration Word 51
- EEPROM Revision 51
- Manufacturing Date 52
- IEEE Physical Address (Copy) 52
- 16-bit Checksum 52
- Serial Number 53
- Serial ID Checksum 53
- Embedded Designs 54
- OBTAINING IEEE ADDRESSES 55
- DEVICE DRIVERS AND 56
- SETUP/INSTALLATION SOFTWARE 56
- Installation Procedure 56
- CONTACTING CUSTOMER SUPPORT 57
- AT CIRRUS 57
- Cirrus Web Site 57
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