Cirrus-logic CS8420 Manuale Utente Scaricare il pdf (Pagina 61)

DS245F4 61

CS8420

13.3.1 Pin Description - Hardware Mode 2

Overall Device Control:

DFC0, DFC1 - Data Flow Control Inputs

DFC0 and DFC1 inputs determine the major data flow options available in Hardware mode, according to Table 5.

S/AES

- Serial Audio or AES3 Input Select

S/AES

is connected to VD+ in Hardware mode 2, in order to select the serial audio input.

SFMT0, SFMT1 - Serial Audio Port Data Format Select Inputs

SFMT0 and SFMT1 select the serial audio input and output ports’ format. See Table 10.

OMCK - Output Section Master Clock Input

Output section master clock input. The frequency must be 256x the output sample rate (Fso).

Audio Input Interface:

SDIN - Serial Audio Input Port Data Input

Audio data serial input pin.

ISCLK - Serial Audio Input Port Bit Clock Input or Output

Serial bit clock for audio data on the SDIN pin.

ILRCK - Serial Audio Input Port Left/Right Clock Input or Output

Word rate clock for the audio data on the SDIN pin. The frequency will be at the input sample rate (Fsi)

1 2 ... 56 57 58 59 60 61 62 63 64 65 66 ... 93 94

Nessun commento

Cirrus-logic CS8420 Manuale Utente Pagina 61